MIPS: smp-cps: Ensure secondary cores start with EVA disabled

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The kernel currently assumes that a core will start up in legacy mode
using the exception base provided through the CM GCR registers. If a
core has been configured in hardware to start in EVA mode, these
assumptions will fail.

This patch ensures that secondary cores are initialized to meet these
assumptions.

Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11907/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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Matt Redfearn 2015-12-18 12:47:00 +00:00 • committed by Ralf Baechle

parent a68f376844

commit 497e803ebf

2 changed files with 7 additions and 0 deletions

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4

arch/mips/include/asm/mips-cm.h

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3

arch/mips/kernel/smp-cps.c

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