drm/i915/dg2: Add Wa_16013000631

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Invalidate IC cache through pipe control command as part of the ctx
restore flow through indirect ctx pointer.

v2:
 - Move pipe control from xcs indirect context to the rcs indirect
   context.  We'll eventually need this on the CCS engines too, but
   support for those hasn't landed yet.

Cc: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211116174818.2128062-5-matthew.d.roper@intel.com

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Ramalingam C 2021-11-16 09:48:17 -08:00 • committed by Matt Roper

parent 34734ab727

commit 4b19f6b728

1 changed files with 5 additions and 0 deletions

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drivers/gpu/drm/i915/gt/intel_lrc.c

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