drm/i915/mtl: C6 residency and C state type for MTL SAMedia

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Add support for C6 residency and C state type for MTL SAMedia. Also add
mtl_drpc.

v2: Fixed review comments (Ashutosh)
v3: Sort registers and fix whitespace errors in intel_gt_regs.h (Matt R)
    Remove MTL_CC_SHIFT (Ashutosh)
    Adapt to RC6 residency register code refactor (Jani N)
v4: Move MTL branch to top in drpc_show
v5: Use FORCEWAKE_MT identical to gen6_drpc (Ashutosh)
v6: Add MISSING_CASE for gt_core_status switch statement (Rodrigo)
    Change state name for MTL_CC0 to C0 (from "on") (Rodrigo)
v7: Change state name for MTL_CC0 to RC0 (Rodrigo)

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221114123348.3474216-6-badal.nilawar@intel.com

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Badal Nilawar 2022-11-14 18:03:48 +05:30 • committed by Rodrigo Vivi

parent 78d0b4552c

commit 4bb9ca7ee0

3 changed files with 76 additions and 5 deletions

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59

drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c

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5

drivers/gpu/drm/i915/gt/intel_gt_regs.h

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17

drivers/gpu/drm/i915/gt/intel_rc6.c

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