clk: tegra: Fix enabling of PLLE

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When enabling the PLLE as its final step, clk_plle_enable() would
accidentally OR in the value previously written to the PLLE_SS_CTRL
register.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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Thierry Reding 2014-04-04 15:55:15 +02:00 • committed by Peter De Schrijver

parent c61e4e75b9

commit 4ccc402ece

1 changed files with 1 additions and 1 deletions

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drivers/clk/tegra/clk-pll.c

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