m68k: fix read/write multi-byte IO for PCI on ColdFire

Browse source

We need to treat built-in peripherals and bus based address ranges
differently. Local built-in peripherals (and the ColdFire SoC parts
have quite a lot of them) are always native endian - which is big
endian on m68k/ColdFire. Bus based address ranges, like the PCI bus,
are accessed little endian - so we need to byte swap those.

So implement readw/writew and readl/writel functions to deal with
memory mapped accesses correctly based on the address range being
accessed.

This fixes readw/writew and readl/writel so that they can be used in
drivers for native SoC hardware modules (many of which are shared with
other architectures (ARM in Freescale SoC parts for example). And also
drivers for PCI devices.

Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
Tested-by: Angelo Dureghello <angelo@sysam.it>

...

This commit is contained in:

Greg Ungerer 2018-03-30 23:40:31 +10:00

parent df8f77dec7

commit 4d53037876

1 changed files with 84 additions and 15 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

101

arch/m68k/include/asm/io_no.h

View file