drm/amdgpu: Align amdgpu_gtt_mgr entries to TLB size on Tahiti (v2)

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The TLB is organized in groups of 8 entries, each one is 4K.
On Tahiti, the HW requires these GART entries to be 32K-aligned.

This fixes a VCE 1 firmware validation failure that can happen
after suspend/resume since we use amdgpu_gtt_mgr for VCE 1.

v2:
- Change variable declaration order
- Add comment about "V bit HW bug"

Fixes: 698fa62f56 ("drm/amdgpu: Add helper to alloc GART entries")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 530411b465)

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Timur Kristóf 2026-05-13 22:04:08 +02:00 • committed by Alex Deucher

parent 48b13bfbdf

commit 4d798ea071

1 changed files with 8 additions and 1 deletions

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drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

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