drm/i915/pvc: Read correct RP_STATE_CAP register

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The SoC registers, including RP_STATE_CAP, have moved to a new location
in GTTMMADR on Ponte Vecchio.  We need to update the register offset
accordingly.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-5-matthew.d.roper@intel.com

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This commit is contained in:

Matt Roper 2022-05-05 14:38:04 -07:00

parent 9d67edba73

commit 4de23dca7e

2 changed files with 4 additions and 1 deletions

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4

drivers/gpu/drm/i915/gt/intel_rps.c

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1

drivers/gpu/drm/i915/i915_reg.h

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