sdhci: Add support for bus-specific IO memory accessors

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Currently the SDHCI driver works with PCI accessors (write{l,b,w} and
read{l,b,w}).

With this patch drivers may change memory accessors, so that we can
support hosts with "weird" IO memory access requirments.

For example, in "FSL eSDHC" SDHCI hardware all registers are 32 bit
width, with big-endian addressing. That is, readb(0x2f) should turn
into readb(0x2c), and readw(0x2c) should be translated to
le16_to_cpu(readw(0x2e)).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

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This commit is contained in:

Anton Vorontsov 2009-03-17 00:13:46 +03:00 • committed by Pierre Ossman

parent f079a8fc61

commit 4e4141a526

3 changed files with 180 additions and 81 deletions

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7

drivers/mmc/host/Kconfig

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159

drivers/mmc/host/sdhci.c

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95

drivers/mmc/host/sdhci.h

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