ARM: OMAP3: Fix CM register bit masks

The register bits for MPU_CLK_SRC and IVA2_CLK_SRC in CM_CLKSEL1_PLL
register are 3 bits wide.  Fix the MASK definition accordingly.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Rajendra Nayak 2012-05-07 23:55:21 -06:00 • committed by Paul Walmsley
commit 4e68f5a79d