drm/i915: Require an exact DP link freq match for the DG2 PLL

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No idea why the DG2 PLL DP link frequency calculation is allowing
a non-exact match. That makes no sense so get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220503182242.18797-24-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>

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Ville Syrjälä 2022-05-03 21:22:39 +03:00

parent f2206df8ec

commit 4f543d664c

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/i915/display/intel_snps_phy.c

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