clk: renesas: r8a77995: Correct RCLK handling

Browse source

According to R-Car Gen3 Hardware Manual Rev.1.00, R-Car D3 has the
RCLK Frequency Control Register (RCKCR), which determines the OSC and
RINT predivider values, and selection of the RCLK clock source between
RINT and the On-Chip Oscillator.

Hence change the OSC and RINT clock definitions to use the RCKCR
divider, and add the missing On-Chip Oscillator and RCLK clock source
switching logic.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

...

This commit is contained in:

Geert Uytterhoeven 2018-07-11 14:12:19 +02:00

parent dc643a843b

commit 4f57998d64

1 changed files with 10 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

12

drivers/clk/renesas/r8a77995-cpg-mssr.c

View file