coresight-etm4x: add isb() before reading the TRCSTATR

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As recommended by section 4.3.7 ("Synchronization when using system
instructions to progrom the trace unit") of ARM IHI 0064H.b, the
self-hosted trace analyzer must perform a Context synchronization
event between writing to the TRCPRGCTLR and reading the TRCSTATR.
Additionally, add an ISB between the each read of TRCSTATR on
coresight_timeout() when using system instructions to program the
trace unit.

Fixes: 1ab3bb9df5 ("coresight: etm4x: Add necessary synchronization for sysreg access")
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250116-etm_sync-v4-1-39f2b05e9514@quicinc.com

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Yuanfang Zhang 2025-01-16 17:04:20 +08:00 • committed by Suzuki K Poulose

parent cade8a89b1

commit 4ff6039ffb

3 changed files with 62 additions and 10 deletions

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20

drivers/hwtracing/coresight/coresight-core.c

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48

drivers/hwtracing/coresight/coresight-etm4x-core.c

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4

include/linux/coresight.h

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