ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers

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dpll4_m3_ck and dpll4_m4_ck have divider bit fields which are 6 bits
wide. However, only values from 1 to 32 are allowed. This means we have
to add a divider tables and list the dividers explicitly.

I believe the same issue is there for other dpll4_mx_ck clocks, but as
I'm not familiar with them, I didn't touch them.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

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Tomi Valkeinen 2013-10-09 16:12:39 +03:00 • committed by Paul Walmsley

parent 262c2c9d06

commit 4ff7e3b65c

1 changed files with 40 additions and 4 deletions

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arch/arm/mach-omap2/cclock3xxx_data.c

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