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mmc: bfin_sdh: Add support for new RSI controller in bf60x
In BF60x RSI controller: 1) MMR read/write width differs. 2) PWR and CTL MMRs are merged to together. 3) ROD and PD_DAT3 bit masks are obsolete. 4) New RSI block size MMR is defined. 5) The definition of DMA descriptor set size is changed. 6) set_ios should powers up controller in 2 steps. In addition, this patch cleans up the spin locks. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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