drm/msm/dsi_pll_7nm: restore VCO rate during restore_state

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PHY disable/enable resets PLL registers to default values. Thus in
addition to restoring several registers we also need to restore VCO rate
settings.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 1ef7c99d14 ("drm/msm/dsi: add support for 7nm DSI PHY/PLL")
Signed-off-by: Rob Clark <robdclark@chromium.org>

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Dmitry Baryshkov 2020-10-15 22:03:29 +03:00 • committed by Rob Clark

parent 91693cbc13

commit 5047ab95bb

1 changed files with 8 additions and 0 deletions

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drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c

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