i2c: qcom-geni: Support systems with 32MHz serial engine clock

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In existing socs, I2C serial engine is sourced from XO (19.2MHz).
Where as in IPQ5424, I2C serial engine is sourced from GPLL0 (32MHz).

The existing map table is based on 19.2MHz. This patch incorporates
the clock map table to derive the SCL clock from the 32MHz source
clock frequency.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>

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Manikanta Mylavarapu 2024-09-30 20:17:09 +05:30 • committed by Andi Shyti

parent 8284750a18

commit 506bb2ab00

1 changed files with 19 additions and 4 deletions

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drivers/i2c/busses/i2c-qcom-geni.c

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