KVM/MIPS32: Binary patching of select privileged instructions.

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Currently, the following instructions are translated:
- CACHE (indexed)
- CACHE (va based): translated to a SYNCI, overkill on D-CACHE operations,
  but still much faster than a trap.
- mfc0/mtc0: the virtual COP0 registers for the guest are implemented as
  2-D array.
  [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0.
  mfc0/mtc0 operations are transformed to load/stores.

Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

...

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Sanjay Lal 2012-11-21 18:34:16 -08:00 • committed by Ralf Baechle

parent 2f4d9b5442

commit 50c8308538

3 changed files with 209 additions and 0 deletions

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23

arch/mips/kvm/kvm_mips_comm.h

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37

arch/mips/kvm/kvm_mips_commpage.c

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149

arch/mips/kvm/kvm_mips_dyntrans.c

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