arm64: Execute DSB during thread switching for TLB/cache maintenance

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The DSB following TLB or cache maintenance ops must be run on the same
CPU. With kernel preemption enabled or for user-space cache maintenance
this may not be the case. This patch adds an explicit DSB in the
__switch_to() function.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

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Catalin Marinas 2013-04-24 14:47:02 +01:00

parent 4b3ea2e04d

commit 5108c67c37

1 changed files with 6 additions and 0 deletions

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arch/arm64/kernel/process.c

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