ASoC: tlv320aic32x4: Model PLL in CCF

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Model and manage the on-board PLL as a component in the Core
Clock Framework.  This should allow us to do some more complex
clock management and power control.  Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.

Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>

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Annaliese McDermond 2019-03-21 17:58:45 -07:00 • committed by Mark Brown

parent 8633d44002

commit 514b044cba

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5 changed files with 431 additions and 95 deletions

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1

sound/soc/codecs/Kconfig

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2

sound/soc/codecs/Makefile

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323

sound/soc/codecs/tlv320aic32x4-clk.c

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195

sound/soc/codecs/tlv320aic32x4.c

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5

sound/soc/codecs/tlv320aic32x4.h

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