clk: tegra20: Turn EMC clock gate into divider

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Kernel should never gate the EMC clock as it causes immediate lockup, so
removing clk-gate functionality doesn't affect anything. Turning EMC clk
gate into divider allows to implement glitch-less EMC scaling, avoiding
reparenting to a backup clock.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Dmitry Osipenko 2018-10-21 21:30:50 +03:00 • committed by Thierry Reding

parent 651022382c

commit 514fddba84

1 changed files with 26 additions and 10 deletions

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drivers/clk/tegra/clk-tegra20.c

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