drm/i915: Fix BXT lane latency optimal setting with MST

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Call the DDI .pre_pll_enable() hook from the MST code so that BXT gets
the correct lane latency optimal setting applied. And we obviously need
to compute the correct value, and read it out to keep the state checker
happy.

While at it drop the useless 'encoder' parameter to
bxt_ddi_phy_calc_lane_lat_optim_mask()

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171027134348.31190-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

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This commit is contained in:

Ville Syrjälä 2017-10-27 16:43:48 +03:00

parent 742745f1ee

commit 5161d058df

4 changed files with 26 additions and 6 deletions

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3

drivers/gpu/drm/i915/i915_drv.h

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3

drivers/gpu/drm/i915/intel_ddi.c

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23

drivers/gpu/drm/i915/intel_dp_mst.c

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3

drivers/gpu/drm/i915/intel_dpio_phy.c

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