ASoC: Intel: Skylake: Disable SRAM Retention before D3

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SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention
feature,otherwise it may lead to SRAM ECC Errors.

Signed-off-by: Dharageswari R <dharageswari.r@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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Dharageswari R 2016-06-03 18:29:37 +05:30 • committed by Mark Brown

parent 1ae7ca041a

commit 51a01b8c2e

2 changed files with 5 additions and 0 deletions

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3

sound/soc/intel/skylake/skl.c

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2

sound/soc/intel/skylake/skl.h

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