drm/amdgpu: Support IOMMU on Raven

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We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for
PDEs and setting S bit to 1 for PTEs when the corresponding addresses
are not occupied by gpu driver allocated buffers.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Yong Zhao 2017-07-27 12:48:22 -04:00 • committed by Alex Deucher

parent 2046d46db9

commit 51ac7eec62

2 changed files with 27 additions and 5 deletions

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29

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

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3

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

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