drm/i915/icl: Get DDI clock for ICL based on PLLs.

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PLLs are the source clocks for the DDIs so in order
to determine the ddi clock we need to check the PLL
configuration.

This gets a little tricky for ICL since there is
no register bit that maps directly to the link clock.
So this patch creates a separate function in intel_dpll_mgr.c
to obtain the write array PLL Params and compares the set
pll_params with the table to get the corresponding link
clock.

v2:
  - Fix the encoder type check (DK).
  - Improve our error checking, return a sane value (Mika, Paulo).
  - Fix table entries (Paulo).

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
[Paulo: implement v2]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180523224444.19017-1-paulo.r.zanoni@intel.com

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This commit is contained in:

Manasi Navare 2018-05-23 15:44:44 -07:00 • committed by Paulo Zanoni

parent f17ca5010c

commit 51c83cfaf9

4 changed files with 101 additions and 0 deletions

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3

drivers/gpu/drm/i915/i915_reg.h

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26

drivers/gpu/drm/i915/intel_ddi.c

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70

drivers/gpu/drm/i915/intel_dpll_mgr.c

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2

drivers/gpu/drm/i915/intel_dpll_mgr.h

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