clk: mediatek: update clock driver of MT2712

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According to 3rd ECO design change,
1. Add new fixed factor clock of audio.
2. Add the parent clocks for audio clock mux.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Weiyi Lu 2018-12-14 10:04:17 +08:00 • committed by Stephen Boyd

parent c3424f59a0

commit 51ff86dd10

1 changed files with 6 additions and 2 deletions

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drivers/clk/mediatek/clk-mt2712.c

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