drm/i915: gmch: factor out intel_set_memory_cxsr

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This functionality will be also needed by an upcoming patch, so factor
it out. As a bonus this also makes things a bit more uniform across
platforms. Note that this also changes the register read-modify-write
to a simple write during disabling. This is what we do during enabling
anyway and according to the spec all the relevant bits are reserved-MBZ
or reserved with a 0 default value.

v2:
- unchanged
v3:
- fix missing cxsr disabling on pineview (Deepak)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

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Imre Deak 2014-07-01 12:36:17 +03:00 • committed by Daniel Vetter

parent d2011dc8d4

commit 5209b1f4c4

2 changed files with 40 additions and 38 deletions

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2

drivers/gpu/drm/i915/i915_drv.h

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76

drivers/gpu/drm/i915/intel_pm.c

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