drm/i915/cx0: Create macro around PLL tables

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Create macro for storing PLL dividers with table name
and clock rate.

v2: Preserve the terminating {} in each PLL table.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260119093757.2850233-7-mika.kahola@intel.com

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Mika Kahola 2026-01-19 09:37:47 +00:00

parent 8115279170

commit 52801b2eb5

1 changed files with 167 additions and 134 deletions

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297

drivers/gpu/drm/i915/display/intel_cx0_phy.c

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