clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate

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The Allwinner A64 manual lists the following constraints for the
PLL-MIPI clock:
 - M/N <= 3
 - (PLL_VIDEO0)/M >= 24MHz

Use these constraints.

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-4-46fc80c83637@oltmanns.dev
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

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Frank Oltmanns 2024-03-10 14:21:14 +01:00 • committed by Jernej Skrabec

parent 5723879c14

commit 52b1429e0c

1 changed files with 7 additions and 5 deletions

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drivers/clk/sunxi-ng/ccu-sun50i-a64.c

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