RISC-V: KVM: Fix the conversion between vsip and hvip

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Per AIA spec 1.0 Section 6.3.2, the interrupt numbers 13-63
shares same bit position between related VS shadow CSRs and
hypervisor CSRs. So there's a shift only for SSI, STI and
SEI interrupt.

Currently the KVM always does a shift for all the interrupts
(include LCOFI with number 13) when doing the conversion
between vsip and hvip. Fix this by only doing shift the SSI,
STI and SEI. Add wrappers for doing the conversion between
vsip and hvip.

Fixes: 16b0bde9a3 ("RISC-V: KVM: Add perf sampling support for guests")
Signed-off-by: Yicong Yang <yang.yicong@picoheart.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260804134018.85497-1-yang.yicong@picoheart.com
Signed-off-by: Anup Patel <anup@brainfault.org>

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This commit is contained in:

Yicong Yang 2026-08-04 21:40:18 +08:00 • committed by Anup Patel

parent aaad136d56

commit 52c6b7d20d

4 changed files with 36 additions and 15 deletions

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20

arch/riscv/include/asm/csr.h

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3

arch/riscv/kvm/vcpu.c

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8

arch/riscv/kvm/vcpu_onereg.c

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20

tools/arch/riscv/include/asm/csr.h

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