drm/i915/gvt: Handle MMIO GEN8_GAMW_ECO_DEV_RW_IA for 64K GTT

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The register RENDER_HWS_PGA_GEN7 is renamed to GEN8_GAMW_ECO_DEV_RW_IA
from GEN8 which can control IPS enabling.

v3: MMIO control for IPS is not removed from gen9 but gen10 (Matthew Auld)
v2: IPS of all engines must be enabled together for gen9.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

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Changbin Du 2018-05-15 10:35:35 +08:00 • committed by Zhenyu Wang

parent 6fd7937832

commit 52ca14e684

1 changed files with 28 additions and 1 deletions

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drivers/gpu/drm/i915/gvt/handlers.c

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