drm/i915/cx0: Determine Cx0 PLL port clock from PLL state

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The port clock is tracked in the PLL state, so there is no need to pass
it separately to __intel_cx0pll_enable(). Drop the port clock function
param accordingly.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-13-mika.kahola@intel.com

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Imre Deak 2025-11-17 12:45:42 +02:00 • committed by Mika Kahola

parent 90fd33c262

commit 538187f17a

1 changed files with 5 additions and 12 deletions

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drivers/gpu/drm/i915/display/intel_cx0_phy.c

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