From 538f65410ee580e8ffaed4eb60a7b7de824442c7 Mon Sep 17 00:00:00 2001 From: Ankit Nautiyal Date: Tue, 15 Sep 2026 22:16:45 +0530 Subject: [PATCH] drm/i915/dip: Add helper to get AS SDP Transmission Line Introduce a DIP helper to compute the Adaptive Sync SDP transmission line and use it when programming the EMP_AS_SDP_TL register. Currently the AS SDP transmission line is programmed to the T1 position. This can be extended in the future to support programming the T2 position as well. While at it, improve the documentation: the AS SDP transmission line corresponds to the T1 position, which maps to the start of the VSYNC pulse. v2: - Move the helper into intel_dip.c and make it static, since intel_dip.c is its only caller. - Drop the now unused prototype from intel_dp.h. - Add the check HAS_EMP_AS_SDP_TL(). (Suraj) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal (#v1) Link: https://patch.msgid.link/20260915164657.3429075-5-ankit.k.nautiyal@intel.com --- drivers/gpu/drm/i915/display/intel_dip.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c index b28352a9e23f..0277b15e1c82 100644 --- a/drivers/gpu/drm/i915/display/intel_dip.c +++ b/drivers/gpu/drm/i915/display/intel_dip.c @@ -9,6 +9,23 @@ #include "intel_dip_regs.h" #include "intel_display_types.h" +static int intel_dip_get_as_sdp_transmission_line(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + + if (!HAS_EMP_AS_SDP_TL(display)) + return 0; + + /* + * EMP_AS_SDP_TL defines the T1 position as the default AS SDP + * Transmission Line, which corresponds to the start of the + * VSYNC pulse. + * + * Use the T1 position for now. + */ + return crtc_state->vrr.vsync_start; +} + u16 intel_dip_read_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -36,7 +53,7 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state) * the register is reset to 0. */ if (intel_crtc_has_dp_encoder(crtc_state)) - transmission_line = crtc_state->vrr.vsync_start; + transmission_line = intel_dip_get_as_sdp_transmission_line(crtc_state); intel_de_write(display, EMP_AS_SDP_TL(display, cpu_transcoder),