From 53f5d2d61a1c824e2b5117637248afe986abf2f2 Mon Sep 17 00:00:00 2001 From: Varadarajan Narayanan Date: Thu, 5 Feb 2026 14:29:33 +0530 Subject: [PATCH] arm64: dts: qcom: ipq9574: Add details for eMMC RDP433 and RDP418 has NAND and eMMC variants. Presently, only NAND variant is supported. To enable support for eMMC variant, add the relevant GPIO and regulator information. Do not enable NAND or eMMC by default in ipq9574-rdp-common.dtsi. Enable it in board specific DTS as applicable. Reviewed-by: Konrad Dybcio Signed-off-by: Varadarajan Narayanan Link: https://lore.kernel.org/r/20260205085936.3220108-2-varadarajan.narayanan@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../boot/dts/qcom/ipq9574-rdp-common.dtsi | 48 ++++++++++++++++++- arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts | 44 +---------------- arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 4 ++ arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts | 4 ++ arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts | 4 ++ arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts | 4 ++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 9 ++++ 7 files changed, 72 insertions(+), 45 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi index fb398857b73d..62877b46f9b3 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi @@ -22,6 +22,15 @@ stdout-path = "serial0:115200n8"; }; + regulator_fixed_1p8: s1800 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-name = "fixed_1p8"; + }; + regulator_fixed_3p3: s3300 { compatible = "regulator-fixed"; regulator-min-microvolt = <3300000>; @@ -137,6 +146,11 @@ }; }; +&sdhc_1 { + vmmc-supply = <®ulator_fixed_3p3>; + vqmmc-supply = <®ulator_fixed_1p8>; +}; + &sleep_clk { clock-frequency = <32000>; }; @@ -185,6 +199,38 @@ bias-disable; }; }; + + sdc_default_state: sdc-default-state { + clk-pins { + pins = "gpio5"; + function = "sdc_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio4"; + function = "sdc_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio0", "gpio1", "gpio2", + "gpio3", "gpio6", "gpio7", + "gpio8", "gpio9"; + function = "sdc_data"; + drive-strength = <8>; + bias-pull-up; + }; + + rclk-pins { + pins = "gpio10"; + function = "sdc_rclk"; + drive-strength = <8>; + bias-pull-down; + }; + }; }; &qpic_bam { @@ -195,8 +241,6 @@ pinctrl-0 = <&qpic_snand_default_state>; pinctrl-names = "default"; - status = "okay"; - flash@0 { compatible = "spi-nand"; reg = <0>; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts index f4f9199d4ab1..23d4cba7c6b6 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts @@ -16,48 +16,6 @@ }; -&sdhc_1 { - pinctrl-0 = <&sdc_default_state>; - pinctrl-names = "default"; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - max-frequency = <384000000>; - bus-width = <8>; +&qpic_nand { status = "okay"; }; - -&tlmm { - sdc_default_state: sdc-default-state { - clk-pins { - pins = "gpio5"; - function = "sdc_clk"; - drive-strength = <8>; - bias-disable; - }; - - cmd-pins { - pins = "gpio4"; - function = "sdc_cmd"; - drive-strength = <8>; - bias-pull-up; - }; - - data-pins { - pins = "gpio0", "gpio1", "gpio2", - "gpio3", "gpio6", "gpio7", - "gpio8", "gpio9"; - function = "sdc_data"; - drive-strength = <8>; - bias-pull-up; - }; - - rclk-pins { - pins = "gpio10"; - function = "sdc_rclk"; - drive-strength = <8>; - bias-pull-down; - }; - }; -}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts index 5a546a14998b..73091067bad2 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts @@ -55,6 +55,10 @@ status = "okay"; }; +&qpic_nand { + status = "okay"; +}; + &tlmm { pcie1_default: pcie1-default-state { diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts index d36d1078763e..cbc9047cfe92 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts @@ -15,3 +15,7 @@ compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574"; }; + +&qpic_nand { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts index c30c9fbedf26..d233ec530cc3 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts @@ -15,3 +15,7 @@ compatible = "qcom,ipq9574-ap-al02-c8", "qcom,ipq9574"; }; + +&qpic_nand { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts index 0dc382f5d5ec..f2334b9e0ed4 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts @@ -14,3 +14,7 @@ model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C9"; compatible = "qcom,ipq9574-ap-al02-c9", "qcom,ipq9574"; }; + +&qpic_nand { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 8cc0098fc5e3..622cfa96ed2b 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -463,6 +463,15 @@ clock-names = "iface", "core", "xo", "ice"; non-removable; supports-cqe; + pinctrl-0 = <&sdc_default_state>; + pinctrl-names = "default"; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + max-frequency = <384000000>; + bus-width = <8>; + status = "disabled"; };