powerpc/64s: micro-optimise __hard_irq_enable() for mtmsrd L=1 support

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Book3S minimum supported ISA version now requires mtmsrd L=1. This
instruction does not require bits other than RI and EE to be supplied,
so __hard_irq_enable() and __hard_irq_disable() does not have to read
the kernel_msr from paca.

Interrupt entry code already relies on L=1 support.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

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Nicholas Piggin 2018-05-05 03:19:28 +10:00 • committed by Michael Ellerman

parent 9f4b61b277

commit 54071e4176

1 changed files with 2 additions and 2 deletions

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arch/powerpc/include/asm/hw_irq.h

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