New clock-ids+exports for two clocks, cleanup for some boilerplate code

for clocks we cannot really control from the kernel, but want to define separately to match the hardware-description (watchdog in secure-grf). Improvement in mmc phase calculation and cleanup of some rate defintions. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl0Zz4EQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgcXICACK8QHJcINYRl68As6BC0YzEVZnVmGwHBOx 8TlE34D/kUyXhfRBMu+PZZLiOzg14Qs9p8oZh8FPFQ5UtpBTH1TmdRnHtOxxDDXy jpEeH7jpsL5xcXoxvbHsyv+VqmVhEr2zNY6CjxeDEmanUmHwQqxZ71OzLuuq1ccR p7Nw1xjW/IHyIKEq5SomKHtulWawfQ7t6xN/IEgbwnAkZO+TzvZBqU44uUhTew2u 6OuBB5AKDTKPkDJjvM/pJzxdLWpxTXm2wgVPbHTJWcVR6MkMSP2V2RaZ0niTPF9q lp5Nf1/gWj5RMv8WTOqG/Qfy4+1OLBsApyZrsU5t00bTPTUAZ2nW =drW4 -----END PGP SIGNATURE----- Merge tag 'v5.3-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip Pull Rockchip clk driver updates from Heiko Stuebner: - New clock-ids+exports for two clocks - Cleanup for some boilerplate code for clocks we cannot really control from the kernel, but want to define separately to match the hardware-description (watchdog in secure-grf) - Improvement in mmc phase calculation and cleanup of some rate defintions * tag 'v5.3-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: export HDMIPHY clock on rk3228 clk: rockchip: add watchdog pclk on rk3328 clk: rockchip: add clock id for hdmi_phy special clock on rk3228 clk: rockchip: add clock id for watchdog pclk on rk3328 clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro clk: rockchip: add a type from SGRF-controlled gate clocks clk: rockchip: Remove 48 MHz PLL rate from rk3288 clk: rockchip: add 1.464GHz cpu-clock rate to rk3228 clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase() clk: rockchip: Don't yell about bad mmc phases when getting clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation
2026-10-16 22:39:48 +00:00 · 2019-07-12 11:07:23 -07:00 · 2019-07-12 11:07:23 -07:00 · 55692cedf3
commit 55692cedf3
parent a188339ca5 794e94ca83
10 changed files with 29 additions and 46 deletions
--- a/drivers/clk/rockchip/clk-mmc-phase.c
+++ b/drivers/clk/rockchip/clk-mmc-phase.c
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h