drm/i915/chv: Add CHV HW status to SSEU status

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Collect the currently enabled counts of slice, subslice, and
execution units using the power gate control ack message
registers specific to Cherryview.

Slice/subslice/EU info and hardware status can now be
determined for CHV, so allow the debugfs SSEU status dump
to proceed for CHV devices.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Jeff McGee 2015-02-27 10:22:32 -08:00 • committed by Daniel Vetter

parent c93043ae1d

commit 5575f03a60

2 changed files with 40 additions and 2 deletions

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31

drivers/gpu/drm/i915/i915_debugfs.c

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11

drivers/gpu/drm/i915/i915_reg.h

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