clk: thead: add support for enabling/disabling PLLs

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The 2nd control word of T-Head TH1520 PLLs contains a bit to put the VCO
into reset state, which means disabling the PLL.

Some PLLs are put to disabled state by the bootloader, and the clock
driver should be able to enable them.

Add support for enabling/disabling PLLs. PLLs other than DPU ones are
set CLK_IS_CRITICAL to prevent killing the system -- they're meant to
drive CPU or system buses (even the GMAC/Video ones are driving arbitrary
buses).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Drew Fustini <fustini@kernel.org>
Signed-off-by: Drew Fustini <fustini@kernel.org>

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Icenowy Zheng 2025-08-16 17:11:11 +08:00 • committed by Drew Fustini

parent c51a37ffea

commit 56a48c1833

1 changed files with 33 additions and 5 deletions

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38

drivers/clk/thead/clk-th1520-ap.c

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