dt-bindings: riscv: cpus: Add SiFive X280 compatible

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Document compatible for the SiFive X280 RISC-V core.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com>
Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>

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Drew Fustini 2025-10-13 20:11:55 -07:00

parent 4de28f1edc

commit 571e42a119

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Documentation/devicetree/bindings/riscv/cpus.yaml

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