drm/i915/gen12: Update combo PHY init sequence

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The bspec was updated with a minor change to the 'DCC mode select'
setting to be programmed during combo PHY initialization.

v2:
 - Keep the opencoded rmw behavior instead of switching to
   intel_de_rmw().  We need to read from a _LN register, but write to
   the _GRP register to update all lanes.

Bspec: 49291
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230221201836.2886794-1-matthew.d.roper@intel.com

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This commit is contained in:

Matt Roper 2023-02-21 12:18:36 -08:00

parent c6a53c90e3

commit 5767dc9e2d

2 changed files with 4 additions and 5 deletions

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5

drivers/gpu/drm/i915/display/intel_combo_phy.c

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4

drivers/gpu/drm/i915/display/intel_combo_phy_regs.h

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