clk: renesas: r9a07g044: Add MTU3a clock and reset entry

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Add MTU3a clock and reset entry to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221005111855.553436-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2022-10-05 12:18:55 +01:00 • committed by Geert Uytterhoeven

parent 864010561d

commit 576d6b40dc

1 changed files with 4 additions and 1 deletions

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drivers/clk/renesas/r9a07g044-cpg.c

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