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PCI: xgene: Define XGENE_PCI_EXP_CAP and use generic PCI_EXP_RTCTL offset
Apparently the PCIe capability is at address 0x40 in config space of X-Gene v1 Root Ports. Add a definition of that and use the generic PCI_EXP_RTCTL offset into the capability. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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