EDAC, altera: Add Arria10 L2 Cache ECC handling

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Add a private data structure for Arria10 L2 cache ECC and the probe
function for it.

The Arria10 ECC device IRQs are in a shared register so the ECC Manager
parent/child relationship requires a different probe function.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-8-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>

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Thor Thayer 2016-03-21 11:01:44 -05:00 • committed by Borislav Petkov

parent 8b39ab7290

commit 588cb03ea2

2 changed files with 273 additions and 0 deletions

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231

drivers/edac/altera_edac.c

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42

drivers/edac/altera_edac.h

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