drm/amd/display: Correct timings in build scaling params

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A previous patch set the addressable timing as active + border,
when in fact, the VESA standard specifies active as equal to
addressable + border.

This patch makes the fix more correct and in line with the standard.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Andrew Jiang 2017-10-10 14:36:39 -04:00 • committed by Alex Deucher

parent 9a5bcd47ea

commit 58bb0e63dd

1 changed files with 3 additions and 14 deletions

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17

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

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