clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks

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This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
register on TI DA8XX-type SoCs.

The USB0 (USB 2.0) PHY clock is an interesting case because it calls
clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
temporarily while we are locking the PLL, which takes place during the
clk_enable() callback.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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David Lechner 2018-03-15 21:52:35 -05:00 • committed by Stephen Boyd

parent 1e88a8d64f

commit 58e1e2d2cd

1 changed files with 351 additions and 0 deletions

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drivers/clk/davinci/da8xx-cfgchip.c

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