iommu/vt-d: Handle Caching Mode implementations of SVM

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Not entirely clear why, but it seems we need to reserve PASID zero and
flush it when we make a PASID entry present.

Quite we we couldn't use the true PASID value, isn't clear.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

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David Woodhouse 2015-10-24 21:06:39 +02:00

parent 5d52f482eb

commit 5a10ba27d9

1 changed files with 18 additions and 5 deletions

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drivers/iommu/intel-svm.c

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