ARM: mvebu: implement Armada 375 coherency workaround

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The early revisions of Armada 375 SOCs (Z1 stepping) have a bug in the
I/O coherency unit that prevents using the normal method for the I/O
coherency barrier. The recommended workaround is to use a XOR memset
transfer to act as the I/O coherency barrier.

This involves "borrowing" a XOR engine, which gets disabled in the
Device Tree so the normal XOR driver doesn't use it.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483228-25625-8-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

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Thomas Petazzoni 2014-04-14 15:47:05 +02:00 • committed by Jason Cooper

parent 77fa4b9ab0

commit 5ab5afd8ba

1 changed files with 165 additions and 3 deletions

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arch/arm/mach-mvebu/coherency.c

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