PCI: tegra194: Make BAR0 programmable and remove 1MB size limit

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The Tegra194/234 Endpoint does not support the Resizable BAR capability,
but BAR0 can be programmed to different sizes via the DBI2 BAR registers
in dw_pcie_ep_set_bar_programmable(). The BAR0 size is set once during
initialization.

Remove the fixed 1MB limit from pci_epc_features so Endpoint function
drivers can configure the BAR0 size they need.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20260324080857.916263-3-mmaddireddy@nvidia.com

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Manikanta Maddireddy 2026-03-24 13:38:55 +05:30 • committed by Manivannan Sadhasivam

parent 5f352433ea

commit 5aec1f18b3

1 changed files with 2 additions and 2 deletions

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drivers/pci/controller/dwc/pcie-tegra194.c

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