drm/i915: Align GGTT sizes to a fence tile row

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Ensure the view occupies the full tile row so that reads/writes into the
VMA do not escape (via fenced detiling) into neighbouring objects - we
will pad the object with scratch pages to satisfy the fence. This
applies the lazy-tiling we employed on gen2/3 to gen4+.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170109161613.11881-2-chris@chris-wilson.co.uk

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This commit is contained in:

Chris Wilson 2017-01-09 16:16:09 +00:00

parent 6649a0b650

commit 5b30694b47

4 changed files with 39 additions and 21 deletions

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5

drivers/gpu/drm/i915/i915_drv.h

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27

drivers/gpu/drm/i915/i915_gem.c

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18

drivers/gpu/drm/i915/i915_gem_tiling.c

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10

drivers/gpu/drm/i915/i915_vma.c

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