ARM: tegra: add common resume handling code for LP1 resuming

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Add support to the Tegra CPU reset vector to detect whether the CPU is
resuming from LP1 suspend state. If it is, branch to the LP1-specific
resume code.

When Tegra enters the LP1 suspend state, the SDRAM controller is placed
into a self-refresh state. For this reason, we must place the LP1 resume
code into IRAM, so that it is accessible before SDRAM access has been
re-enabled.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

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Joseph Lo 2013-08-12 17:40:00 +08:00 • committed by Stephen Warren

parent 20984c44b5

commit 5b795d051c

3 changed files with 17 additions and 0 deletions

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2

arch/arm/mach-tegra/iomap.h

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13

arch/arm/mach-tegra/reset-handler.S

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2

arch/arm/mach-tegra/reset.c

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