From 5c44f000fdb9aa4eb0e7f14e4d0c0e97124eb856 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 24 Jul 2025 10:38:59 +0200 Subject: [PATCH] arm64: dts: mediatek: mt7986a: Fix PCI-Express T-PHY node address [ Upstream commit 6b3fff78c13f1a2ba5a355a101fa1ca0a13054ad ] The PCIe TPHY is under the soc bus, which provides MMIO, and all nodes under that must use the bus, otherwise those would clearly be out of place. Add ranges to the PCIe tphy and assign the address to the main node to silence a dtbs_check warning, and fix the children to use the MMIO range of t-phy. Fixes: 963c3b0c47ec ("arm64: dts: mediatek: fix t-phy unit name") Fixes: 918aed7abd2d ("arm64: dts: mt7986: add pcie related device nodes") Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Fei Shao Link: https://lore.kernel.org/r/20250724083914.61351-24-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 559990dcd1d1..3211905b6f86 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -428,16 +428,16 @@ }; }; - pcie_phy: t-phy { + pcie_phy: t-phy@11c00000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; - ranges; - #address-cells = <2>; - #size-cells = <2>; + ranges = <0 0 0x11c00000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; status = "disabled"; - pcie_port: pcie-phy@11c00000 { - reg = <0 0x11c00000 0 0x20000>; + pcie_port: pcie-phy@0 { + reg = <0 0x20000>; clocks = <&clk40m>; clock-names = "ref"; #phy-cells = <1>;